IBNOS
pic.c
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1 /*
2  * Copyright (c) 2014, Michael Müller
3  * Copyright (c) 2014, Sebastian Lackner
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions are met:
8  *
9  * 1. Redistributions of source code must retain the above copyright notice, this
10  * list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright notice,
12  * this list of conditions and the following disclaimer in the documentation
13  * and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
19  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
22  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  */
27 
28 #include <hardware/pic.h>
29 #include <interrupt/interrupt.h>
30 #include <console/console.h>
31 #include <util/util.h>
32 #include <io/io.h>
33 
45 uint32_t irqBase = 0;
46 
48 
61 static uint32_t interrupt_irq(uint32_t interrupt, UNUSED uint32_t error, UNUSED struct thread *t)
62 {
63  uint32_t status = INTERRUPT_CONTINUE_EXECUTION;
64  uint32_t irq = interrupt - irqBase;
65  assert(irq < IRQ_COUNT);
66 
67  /* TODO: handle spurious IRQs */
68 
69  /*
70  * We should never get irq 2 since it is only used to notify the master PIC
71  * about irqs on the slave PIC and the slave IRQs have a higher priority.
72  * Since we also send EOI to the master when an IRQ on the slave is
73  * signaled, this interrupt should never reach the CPU.
74  */
75  assert(irq != IRQ_SLAVE);
76 
77  if (irqTable[irq])
78  status = irqTable[irq](irq);
79  else
80  {
81  consoleWriteString("Unhandled IRQ: ");
82  consoleWriteHex32(irq);
83  consoleWriteString("\n");
84  }
85 
86  /* Send EOI */
87  if(irq >= 8)
89 
91 
92  return status;
93 }
94 
103 void picInit(uint32_t interruptOffset)
104 {
105  uint32_t i;
106 
107  /* the offset must be a multiple of 8 */
108  assert((interruptOffset & 7) == 0);
109  irqBase = interruptOffset;
110 
111  /* Initialize in Cascade mode */
114 
115  outb(PIC1_DATA_PORT, interruptOffset);
116  outb(PIC2_DATA_PORT, interruptOffset + 8);
117 
118  outb(PIC1_DATA_PORT, 4);
119  outb(PIC2_DATA_PORT, 2);
120 
123 
124  /*
125  * Disable all IRQs except the slave IRQ, it won't signal until we enable
126  * an IRQ on the slave chip.
127  */
128  outb(PIC1_DATA_PORT, 0xF & (~IRQ_SLAVE));
129  outb(PIC2_DATA_PORT, 0xF);
130 
131  /* reset the irqTable */
132  for (i = 0; i < IRQ_COUNT; i++)
133  irqTable[i] = NULL;
134 
135  /* reserve all 16 interrupts which are now connected to an IRQ */
136  for (i = 0; i < IRQ_COUNT; i++)
137  assert(interruptReserve(interruptOffset + i, interrupt_irq));
138 }
139 
151 bool picReserveIRQ(uint32_t irq, irq_callback callback)
152 {
153  uint16_t port;
154  uint8_t mask;
155 
156  assert(irq < IRQ_COUNT);
157  if (irqTable[irq])
158  return false;
159 
160  assert(irq != IRQ_SLAVE);
161  irqTable[irq] = callback;
162 
163  /* actually unmask the irq on the PIC */
164  if(irq < 8)
165  {
166  port = PIC1_DATA_PORT;
167  }
168  else
169  {
170  port = PIC2_DATA_PORT;
171  irq -= 8;
172  }
173 
174  mask = inb(port);
175  mask &= ~(1 << irq);
176  outb(port, mask);
177 
178  return true;
179 }
186 void picFreeIRQ(uint32_t irq)
187 {
188  uint16_t port;
189  uint8_t mask;
190 
191  assert(irq < IRQ_COUNT);
192  if (!irqTable[irq])
193  return;
194 
195  assert(irq != IRQ_SLAVE);
196  irqTable[irq] = NULL;
197 
198  if(irq < 8)
199  {
200  port = PIC1_DATA_PORT;
201  }
202  else
203  {
204  port = PIC2_DATA_PORT;
205  irq -= 8;
206  }
207 
208  mask = inb(port);
209  mask |= 1 << irq;
210  outb(port, mask);
211 }
bool interruptReserve(uint32_t interrupt, interrupt_callback callback)
Request an interrupt.
Definition: interrupt.c:727
#define PIC1_DATA_PORT
Definition: pic.h:39
#define IRQ_COUNT
Definition: pic.h:57
#define PIC_EOI
Definition: pic.h:55
#define PIC1_COMMAND_PORT
Definition: pic.h:38
#define assert(ex)
Definition: util.h:61
#define UNUSED
Definition: util.h:39
void outb(uint16_t port, uint8_t val)
Definition: io.h:35
uint32_t irqBase
Definition: pic.c:45
uint8_t inb(uint16_t port)
Definition: io.h:50
uint32_t(* irq_callback)(uint32_t irq)
Definition: pic.h:82
bool picReserveIRQ(uint32_t irq, irq_callback callback)
Assign a callback function to an IRQ.
Definition: pic.c:151
Definition: thread.h:47
#define ICW1_INIT
Definition: pic.h:47
#define IRQ_SLAVE
Definition: pic.h:67
void consoleWriteHex32(uint32_t value)
Write a 32 bit integer as hex value on the console.
Definition: console.c:303
#define PIC2_DATA_PORT
Definition: pic.h:41
#define ICW1_ICW4
Definition: pic.h:43
void picInit(uint32_t interruptOffset)
Initializes the programmable interrupt controller.
Definition: pic.c:103
void consoleWriteString(const char *str)
Write a C string to the console.
Definition: console.c:240
void picFreeIRQ(uint32_t irq)
Release an IRQ.
Definition: pic.c:186
#define INTERRUPT_CONTINUE_EXECUTION
Definition: interrupt.h:48
#define PIC2_COMMAND_PORT
Definition: pic.h:40
irq_callback irqTable[IRQ_COUNT]
Definition: pic.c:47
#define ICW4_8086
Definition: pic.h:49